INTRODUCTION
1. INTRODUCTION
SPICE is a general-purpose circuit simulation program
for nonlinear dc, nonlinear transient, and linear ac ana-
lyses. Circuits may contain resistors, capacitors, induc-
tors, mutual inductors, independent voltage and current
sources, four types of dependent sources, lossless and lossy
transmission lines (two separate implementations), switches,
uniform distributed RC lines, and the five most common sem-
iconductor devices: diodes, BJTs, JFETs, MESFETs, and MOS-
FETs.
The SPICE3 version is based directly on SPICE 2G.6.
While SPICE3 is being developed to include new features, it
continues to support those capabilities and models which
remain in extensive use in the SPICE2 program.
SPICE has built-in models for the semiconductor dev-
ices, and the user need specify only the pertinent model
parameter values. The model for the BJT is based on the
integral-charge model of Gummel and Poon; however, if the
Gummel- Poon parameters are not specified, the model reduces
to the simpler Ebers-Moll model. In either case, charge-
storage effects, ohmic resistances, and a current-dependent
output conductance may be included. The diode model can be
used for either junction diodes or Schottky barrier diodes.
The JFET model is based on the FET model of Shichman and
Hodges. Six MOSFET models are implemented: MOS1 is
described by a square-law I-V characteristic, MOS2 [1] is an
analytical model, while MOS3 [1] is a semi-empirical model;
MOS6 [2] is a simple analytic model accurate in the short-
channel region; MOS4 [3, 4] and MOS5 [5] are the BSIM
(Berkeley Short-channel IGFET Model) and BSIM2. MOS2, MOS3,
and MOS4 include second-order effects such as channel-length
modulation, subthreshold conduction, scattering-limited
velocity saturation, small-size effects, and charge-
controlled capacitances.
Pole-Zero Analysis
1.1.4. Pole-Zero Analysis
The pole-zero analysis portion of SPICE computes the
poles and/or zeros in the small-signal ac transfer function.
The program first computes the dc operating point and then
determines the linearized, small-signal models for all the
nonlinear devices in the circuit. This circuit is then used
to find the poles and zeros of the transfer function.
Two types of transfer functions are allowed : one of
the form (output voltage)/(input voltage) and the other of
the form (output voltage)/(input current). These two types
of transfer functions cover all the cases and one can find
the poles/zeros of functions like input/output impedance and
voltage gain. The input and output ports are specified as
two pairs of nodes.
The pole-zero analysis works with resistors, capaci-
tors, inductors, linear-controlled sources, independent
sources, BJTs, MOSFETs, JFETs and diodes. Transmission
lines are not supported.
The method used in the analysis is a sub-optimal numer-
ical search. For large circuits it may take a considerable
time or fail to find all poles and zeros. For some cir-
cuits, the method becomes "lost" and finds an excessive
number of poles or zeros.
ANALYSIS AT DIFFERENT TEMPERATURES
1.2. ANALYSIS AT DIFFERENT TEMPERATURES
All input data for SPICE is assumed to have been meas-
o
ured at a nominal temperature of 27 C, which can be changed
by use of the TNOM parameter on the .OPTION control line.
This value can further be overridden for any device which
models temperature effects by specifying the TNOM parameter
on the model itself. The circuit simulation is performed at
o
a temperature of 27 C, unless overridden by a TEMP parameter
on the .OPTION control line. Individual instances may
further override the circuit temperature through the specif-
ication of a TEMP parameter on the instance.
Temperature dependent support is provided for resis-
tors, diodes, JFETs, BJTs, and level 1, 2, and 3 MOSFETs.
BSIM (levels 4 and 5) MOSFETs have an alternate temperature
dependency scheme which adjusts all of the model parameters
before input to SPICE. For details of the BSIM temperature
adjustment, see [6] and [7].
Temperature appears explicitly in the exponential terms
of the BJT and diode model equations. In addition, satura-
tion currents have a built-in temperature dependence. The
temperature dependence of the saturation current in the BJT
models is determined by:
XTI
|T | | E q(T T )|
1 g 1 0
I (T ) = I (T ) |--| exp|-----------|
S 1 S 0
|T | |k (T - T )|
0 1 0
where k is Boltzmann's constant, q is the electronic
charge, E is the energy gap which is a model parameter,
G
and XTI is the saturation current temperature exponent
(also a model parameter, and usually equal to 3).
The temperature dependence of forward and reverse beta
is according to the formula:
XTB
|T |
1
B(T ) = B(T ) |--|
1 0
|T |
0
where T and T are in degrees Kelvin, and XTB is a
1 0
user-supplied model parameter. Temperature effects on
beta are carried out by appropriate adjustment to the
values of B , I , B , and I (spice model parameters
F SE R SC
BF, ISE, BR, and ISC, respectively).
Temperature dependence of the saturation current in the
junction diode model is determined by:
XTI
---
N
|T | | E q(T T ) |
1 g 1 0
I (T ) = I (T ) |--| exp|-------------|
S 1 S 0
|T | |N k (T - T )|
0 1 0
where N is the emission coefficient, which is a model
parameter, and the other symbols have the same meaning
as above. Note that for Schottky barrier diodes, the
value of the saturation current temperature exponent,
XTI, is usually 2.
Temperature appears explicitly in the value of junction
potential, U (in spice PHI), for all the device models. The
temperature dependence is determined by:
| N N |
a d
kT |------ |
U(T) = -- log 2
q e |N (T) |
i
where k is Boltzmann's constant, q is the electronic
charge, N is the acceptor impurity density, N is the
a d
donor impurity density, N is the intrinsic carrier con-
i
centration, and E is the energy gap.
g
Temperature appears explicitly in the value of surface
mobility, M (or UO), for the MOSFET model. The temperature
0
dependence is determined by:
M (T )
0 0
M (T) = -------
0 1.5
| T|
|--|
|T |
0
The effects of temperature on resistors is modeled by
the formula:
2
R(T) = R(T ) [1 + TC (T - T ) + TC (T - T ) ]
0 1 0 2 0
where T is the circuit temperature, T is the nominal
0
temperature, and TC and TC are the first- and second-
1 2
order temperature coefficients.
GENERAL STRUCTURE AND CONVENTIONS
2.1. GENERAL STRUCTURE AND CONVENTIONS
The circuit to be analyzed is described to SPICE by a
set of element lines, which define the circuit topology and
element values, and a set of control lines, which define the
model parameters and the run controls. The first line in
the input file must be the title, and the last line must be
".END". The order of the remaining lines is arbitrary
(except, of course, that continuation lines must immediately
follow the line being continued).
Each element in the circuit is specified by an element
line that contains the element name, the circuit nodes to
which the element is connected, and the values of the param-
eters that determine the electrical characteristics of the
element. The first letter of the element name specifies the
element type. The format for the SPICE element types is
given in what follows. The strings XXXXXXX, YYYYYYY, and
ZZZZZZZ denote arbitrary alphanumeric strings. For example,
a resistor name must begin with the letter R and can contain
one or more characters. Hence, R, R1, RSE, ROUT, and
R3AC2ZY are valid resistor names. Details of each type of
device are supplied in a following section.
Fields on a line are separated by one or more blanks, a
comma, an equal ('=') sign, or a left or right parenthesis;
extra spaces are ignored. A line may be continued by enter-
ing a '+' (plus) in column 1 of the following line; SPICE
continues reading beginning with column 2.
A name field must begin with a letter (A through Z) and
cannot contain any delimiters.
A number field may be an integer field (12, -44), a
floating point field (3.14159), either an integer or float-
ing point number followed by an integer exponent (1e-14,
2.65e3), or either an integer or a floating point number
followed by one of the following scale factors:
12 9 6 3 -6
T = 10 G = 10 Meg = 10 K = 10 mil = 25.4
-3 -6 -9 -12 -15
m = 10 u (or M) = 10 n = 10 p = 10 f = 10
Letters immediately following a number that are not scale
factors are ignored, and letters immediately following a
scale factor are ignored. Hence, 10, 10V, 10Volts, and 10Hz
all represent the same number, and M, MA, MSec, and MMhos
all represent the same scale factor. Note that 1000,
1000.0, 1000Hz, 1e3, 1.0e3, 1KHz, and 1K all represent the
same number.
Nodes names may be arbitrary character strings. The
datum (ground) node must be named '0'. Note the difference
in SPICE3 where the nodes are treated as character strings
and not evaluated as numbers, thus '0' and '00' are distinct
nodes in SPICE3 but not in SPICE2. The circuit cannot con-
tain a loop of voltage sources and/or inductors and cannot
contain a cut-set of current sources and/or capacitors.
Each node in the circuit must have a dc path to ground.
Every node must have at least two connections except for
transmission line nodes (to permit unterminated transmission
lines) and MOSFET substrate nodes (which have two internal
connections anyway).
DEVICE MODELS
2.3. DEVICE MODELS
General form:
.MODEL MNAME TYPE(PNAME1=PVAL1 PNAME2=PVAL2 ... )
Examples:
.MODEL MOD1 NPN (BF=50 IS=1E-13 VBF=50)
Most simple circuit elements typically require only a
few parameter values. However, some devices (semiconductor
devices in particular) that are included in SPICE require
many parameter values. Often, many devices in a circuit are
defined by the same set of device model parameters. For
these reasons, a set of device model parameters is defined
on a separate .MODEL line and assigned a unique model name.
The device element lines in SPICE then refer to the model
name.
For these more complex device types, each device ele-
ment line contains the device name, the nodes to which the
device is connected, and the device model name. In addi-
tion, other optional parameters may be specified for some
devices: geometric factors and an initial condition (see
the following section on Transistors and Diodes for more de-
tails).
MNAME in the above is the model name, and type is one
of the following fifteen types:
R Semiconductor resistor model
C Semiconductor capacitor model
SW Voltage controlled switch
CSW Current controlled switch
URC Uniform distributed RC model
LTRA Lossy transmission line model
D Diode model
NPN NPN BJT model
PNP PNP BJT model
NJF N-channel JFET model
PJF P-channel JFET model
NMOS N-channel MOSFET model
PMOS P-channel MOSFET model
NMF N-channel MESFET model
PMF P-channel MESFET model
Parameter values are defined by appending the parameter
name followed by an equal sign and the parameter value.
Model parameters that are not given a value are assigned the
default values given below for each model type. Models,
model parameters, and default values are listed in the next
section along with the description of device element lines.
Semiconductor Resistor Model (R)
3.1.3. Semiconductor Resistor Model (R)
The resistor model consists of process-related device
data that allow the resistance to be calculated from
geometric information and to be corrected for temperature.
The parameters available are:
name parameter units default example
o
TC1 first order temperature coeff. Z/ C 0.0 -
o 2
TC2 second order temperature coeff. Z/ C 0.0 -
RSH sheet resistance Z/[] - 50
DEFW default width meters 1e-6 2e-6
NARROW narrowing due to side etching meters 0.0 1e-7
o
TNOM parameter measurement temperature C 27 50
The sheet resistance is used with the narrowing parame-
ter and L and W from the resistor device to determine the
nominal resistance by the formula
L - NARROW
R = RSH ----------
W - NARROW
DEFW is used to supply a default value for W if one is not
specified for the device. If either RSH or L is not speci-
fied, then the standard default resistance value of 1k Z is
used. TNOM is used to override the circuit-wide value given
on the .OPTIONS control line where the parameters of this
model have been measured at a different temperature. After
the nominal resistance is calculated, it is adjusted for
temperature by the formula:
2
R(T) = R(T ) [1 + TC1 (T - T ) + TC2 (T-T ) ]
0 0 0
Switch Model (SW/CSW)
3.1.10. Switch Model (SW/CSW)
The switch model allows an almost ideal switch to be
described in SPICE. The switch is not quite ideal, in that
the resistance can not change from 0 to infinity, but must
always have a finite positive value. By proper selection of
the on and off resistances, they can be effectively zero and
infinity in comparison to other circuit elements. The
parameters available are:
name parameter units default switch
VT threshold voltage Volts 0.0 S
IT threshold current Amps 0.0 W
VH hysteresis voltage Volts 0.0 S
IH hysteresis current Amps 0.0 W
RON on resistance Z 1.0 both
ROFF off resistance Z 1/GMIN* both
*(See the .OPTIONS control line for a description of
GMIN, its default value results in an off-resistance of
1.0e+12 ohms.)
The use of an ideal element that is highly nonlinear
such as a switch can cause large discontinuities to occur in
the circuit node voltages. A rapid change such as that
associated with a switch changing state can cause numerical
roundoff or tolerance problems leading to erroneous results
or timestep difficulties. The user of switches can improve
the situation by taking the following steps:
First, it is wise to set ideal switch impedances just
high or low enough to be negligible with respect to other
circuit elements. Using switch impedances that are close to
"ideal" in all cases aggravates the problem of discontinui-
ties mentioned above. Of course, when modeling real devices
such as MOSFETS, the on resistance should be adjusted to a
realistic level depending on the size of the device being
modeled.
If a wide range of ON to OFF resistance must be used in
the switches (ROFF/RON >1e+12), then the tolerance on errors
allowed during transient analysis should be decreased by
using the .OPTIONS control line and specifying TRTOL to be
less than the default value of 7.0. When switches are
placed around capacitors, then the option CHGTOL should also
be reduced. Suggested values for these two options are 1.0
and 1e-16 respectively. These changes inform SPICE3 to be
more careful around the switch points so that no errors are
made due to the rapid change in the circuit.
Independent Sources
3.2.1. Independent Sources
General form:
VXXXXXXX N+ N- <<DC> DC/TRAN VALUE> <AC <ACMAG <ACPHASE>>>
+ <DISTOF1 <F1MAG <F1PHASE>>> <DISTOF2 <F2MAG <F2PHASE>>>
IYYYYYYY N+ N- <<DC> DC/TRAN VALUE> <AC <ACMAG <ACPHASE>>>
+ <DISTOF1 <F1MAG <F1PHASE>>> <DISTOF2 <F2MAG <F2PHASE>>>
Examples:
VCC 10 0 DC 6
VIN 13 2 0.001 AC 1 SIN(0 1 1MEG)
ISRC 23 21 AC 0.333 45.0 SFFM(0 1 10K 5 1K)
VMEAS 12 9
VCARRIER 1 0 DISTOF1 0.1 -90.0
VMODULATOR 2 0 DISTOF2 0.01
IIN1 1 5 AC 1 DISTOF1 DISTOF2 0.001
N+ and N- are the positive and negative nodes, respec-
tively. Note that voltage sources need not be grounded.
Positive current is assumed to flow from the positive node,
through the source, to the negative node. A current source
of positive value forces current to flow out of the N+ node,
through the source, and into the N- node. Voltage sources,
in addition to being used for circuit excitation, are the
'ammeters' for SPICE, that is, zero valued voltage sources
may be inserted into the circuit for the purpose of measur-
ing current. They of course have no effect on circuit
operation since they represent short-circuits.
DC/TRAN is the dc and transient analysis value of the
source. If the source value is zero both for dc and tran-
sient analyses, this value may be omitted. If the source
value is time-invariant (e.g., a power supply), then the
value may optionally be preceded by the letters DC.
ACMAG is the ac magnitude and ACPHASE is the ac phase.
The source is set to this value in the ac analysis. If
ACMAG is omitted following the keyword AC, a value of unity
is assumed. If ACPHASE is omitted, a value of zero is
assumed. If the source is not an ac small-signal input, the
keyword AC and the ac values are omitted.
DISTOF1 and DISTOF2 are the keywords that specify that
the independent source has distortion inputs at the frequen-
cies F1 and F2 respectively (see the description of the
.DISTO control line). The keywords may be followed by an
optional magnitude and phase. The default values of the
magnitude and phase are 1.0 and 0.0 respectively.
Any independent source can be assigned a time-dependent
value for transient analysis. If a source is assigned a
time-dependent value, the time-zero value is used for dc
analysis. There are five independent source functions:
pulse, exponential, sinusoidal, piece-wise linear, and
single-frequency FM. If parameters other than source values
are omitted or set to zero, the default values shown are
assumed. (TSTEP is the printing increment and TSTOP is the
final time (see the .TRAN control line for explanation)).
Non-linear Dependent Sources
3.2.3. Non-linear Dependent Sources
General form:
BXXXXXXX N+ N- <I=EXPR> <V=EXPR>
Examples:
B1 0 1 I=cos(v(1))+sin(v(2))
B1 0 1 V=ln(cos(log(v(1,2)^2)))-v(3)^4+v(2)^v(1)
B1 3 4 I=17
B1 3 4 V=exp(pi^i(vdd))
N+ is the positive node, and N- is the negative node.
The values of the V and I parameters determine the voltages
and currents across and through the device, respectively.
If I is given then the device is a current source, and if V
is given the device is a voltage source. One and only one
of these parameters must be given.
The small-signal AC behavior of the nonlinear source is
a linear dependent source (or sources) with a proportional-
ity constant equal to the derivative (or derivatives) of the
source at the DC operating point.
The expressions given for V and I may be any function
of voltages and currents through voltage sources in the sys-
tem. The following functions of real variables are defined:
abs asinh cosh sin
acos atan exp sinh
acosh atanh ln sqrt
asin cos log tan
The function "u" is the unit step function, with a
value of one for arguments greater than one and a value of
zero for arguments less than zero. The function "uramp" is
the integral of the unit step: for an input x, the value is
zero if x is less than zero, or if x is greater than zero
the value is x. These two functions are useful in sythesiz-
ing piece-wise non-linear functions, though convergence may
be adversely affected.
The following standard operators are defined:
+ - * / ^ unary -
If the argument of log, ln, or sqrt becomes less than
zero, the absolute value of the argument is used. If a
divisor becomes zero or the argument of log or ln becomes
zero, an error will result. Other problems may occur when
the argument for a function in a partial derivative enters a
region where that function is undefined.
To get time into the expression you can integrate the
current from a constant current source with a capacitor and
use the resulting voltage (don't forget to set the initial
voltage across the capacitor). Non-linear resistors, capa-
citors, and inductors may be synthesized with the nonlinear
dependent source. Non-linear resistors are obvious. Non-
linear capacitors and inductors are implemented with their
linear counterparts by a change of variables implemented
with the nonlinear dependent source. The following subcir-
cuit will implement a nonlinear capacitor:
.Subckt nlcap pos neg
* Bx: calculate f(input voltage)
Bx 1 0 v = f(v(pos,neg))
* Cx: linear capacitance
Cx 2 0 1
* Vx: Ammeter to measure current into the capacitor
Vx 2 1 DC 0Volts
* Drive the current through Cx back into the circuit
Fx pos neg Vx 1
.ends
Non-linear inductors are similar.
Lossless Transmission Lines
3.3.1. Lossless Transmission Lines
General form:
TXXXXXXX N1 N2 N3 N4 Z0=VALUE <TD=VALUE> <F=FREQ <NL=NRMLEN>>
+ <IC=V1, I1, V2, I2>
Examples:
T1 1 0 2 0 Z0=50 TD=10NS
N1 and N2 are the nodes at port 1; N3 and N4 are the
nodes at port 2. Z0 is the characteristic impedance. The
length of the line may be expressed in either of two forms.
The transmission delay, TD, may be specified directly (as
TD=10ns, for example). Alternatively, a frequency F may be
given, together with NL, the normalized electrical length of
the transmission line with respect to the wavelength in the
line at the frequency F. If a frequency is specified but NL
is omitted, 0.25 is assumed (that is, the frequency is
assumed to be the quarter-wave frequency). Note that
although both forms for expressing the line length are indi-
cated as optional, one of the two must be specified.
Note that this element models only one propagating
mode. If all four nodes are distinct in the actual circuit,
then two modes may be excited. To simulate such a situa-
tion, two transmission-line elements are required. (see the
example in Appendix A for further clarification.)
The (optional) initial condition specification consists
of the voltage and current at each of the transmission line
ports. Note that the initial conditions (if any) apply
'only' if the UIC option is specified on the .TRAN control
line.
Note that a lossy transmission line (see below) with
zero loss may be more accurate than than the lossless
transmission line due to implementation details.
Lossy Transmission Line Model (LTRA)
3.3.3. Lossy Transmission Line Model (LTRA)
The uniform RLC/RC/LC/RG transmission line model (re-
ferred to as the LTRA model henceforth) models a uniform
constant-parameter distributed transmission line. The RC
and LC cases may also be modeled using the URC and TRA
models; however, the newer LTRA model is usually faster and
more accurate than the others. The operation of the LTRA
model is based on the convolution of the transmission line's
impulse responses with its inputs (see [8]).
The LTRA model takes a number of parameters, some of
which must be given and some of which are optional.
name parameter units/type default example
R resistance/length Z/unit 0.0 0.2
L inductance/length henrys/unit 0.0 9.13e-9
G conductance/length mhos/unit 0.0 0.0
C capacitance/length farads/unit 0.0 3.65e-12
LEN length of line no default 1.0
REL breakpoint control arbitrary unit 1 0.5
ABS breakpoint control 1 5
NOSTEPLIMIT don't limit timestep to less than flag not set set
line delay
NOCONTROL don't do complex timestep control flag not set set
LININTERP use linear interpolation flag not set set
MIXEDINTERP use linear when quadratic seems bad not set set
COMPACTREL special reltol for history compaction flag RELTOL 1.0e-3
COMPACTABS special abstol for history compaction ABSTOL 1.0e-9
TRUNCNR use Newton-Raphson method for flag not set set
timestep control
TRUNCDONTCUT don't limit timestep to keep flag not set set
impulse-response errors low
The following types of lines have been implemented so
far: RLC (uniform transmission line with series loss only),
RC (uniform RC line), LC (lossless transmission line), and
RG (distributed series resistance and parallel conductance
only). Any other combination will yield erroneous results
and should not be tried. The length LEN of the line must be
specified.
NOSTEPLIMIT is a flag that will remove the default res-
triction of limiting time-steps to less than the line delay
in the RLC case. NOCONTROL is a flag that prevents the
default limiting of the time-step based on convolution error
criteria in the RLC and RC cases. This speeds up simulation
but may in some cases reduce the accuracy of results.
LININTERP is a flag that, when specified, will use linear
interpolation instead of the default quadratic interpolation
for calculating delayed signals. MIXEDINTERP is a flag
that, when specified, uses a metric for judging whether qua-
dratic interpolation is not applicable and if so uses linear
interpolation; otherwise it uses the default quadratic
interpolation. TRUNCDONTCUT is a flag that removes the
default cutting of the time-step to limit errors in the
actual calculation of impulse-response related quantities.
COMPACTREL and COMPACTABS are quantities that control the
compaction of the past history of values stored for convolu-
tion. Larger values of these lower accuracy but usually
increase simulation speed. These are to be used with the
TRYTOCOMPACT option, described in the .OPTIONS section.
TRUNCNR is a flag that turns on the use of Newton-Raphson
iterations to determine an appropriate timestep in the
timestep control routines. The default is a trial and error
procedure by cutting the previous timestep in half. REL and
ABS are quantities that control the setting of breakpoints.
The option most worth experimenting with for increasing
the speed of simulation is REL. The default value of 1 is
usually safe from the point of view of accuracy but occa-
sionally increases computation time. A value greater than 2
eliminates all breakpoints and may be worth trying depending
on the nature of the rest of the circuit, keeping in mind
that it might not be safe from the viewpoint of accuracy.
Breakpoints may usually be entirely eliminated if it is
expected the circuit will not display sharp discontinuities.
Values between 0 and 1 are usually not required but may be
used for setting many breakpoints.
COMPACTREL may also be experimented with when the
option TRYTOCOMPACT is specified in a .OPTIONS card. The
legal range is between 0 and 1. Larger values usually
decrease the accuracy of the simulation but in some cases
improve speed. If TRYTOCOMPACT is not specified on a
.OPTIONS card, history compaction is not attempted and accu-
racy is high. NOCONTROL, TRUNCDONTCUT and NOSTEPLIMIT also
tend to increase speed at the expense of accuracy.
Uniform Distributed RC Model (URC)
3.3.5. Uniform Distributed RC Model (URC)
The URC model is derived from a model proposed by L.
Gertzberrg in 1974. The model is accomplished by a subcir-
cuit type expansion of the URC line into a network of lumped
RC segments with internally generated nodes. The RC seg-
ments are in a geometric progression, increasing toward the
middle of the URC line, with K as a proportionality con-
stant. The number of lumped segments used, if not specified
for the URC line device, is determined by the following for-
mula:
2
| R C |(K-1)| |
_ _ 2
log|F 2 J L |-----| |
max
| L L | K | |
N = ------------------------------
log K
The URC line is made up strictly of resistor and capa-
citor segments unless the ISPERL parameter is given a non-
zero value, in which case the capacitors are replaced with
reverse biased diodes with a zero-bias junction capacitance
equivalent to the capacitance replaced, and with a satura-
tion current of ISPERL amps per meter of transmission line
and an optional series resistance equivalent to RSPERL ohms
per meter.
name parameter units default example area
1 K Propagation Constant - 2.0 1.2 -
2 FMAX Maximum Frequency of interest Hz 1.0G 6.5Meg -
3 RPERL Resistance per unit length Z/m 1000 10 -
4 CPERL Capacitance per unit length F/m 1.0e-15 1pF -
5 ISPERL Saturation Current per unit length A/m 0 - -
6 RSPERL Diode Resistance per unit length Z/m 0 - -
Bipolar Junction Transistors (BJTs)
3.4.3. Bipolar Junction Transistors (BJTs)
General form:
QXXXXXXX NC NB NE <NS> MNAME <AREA> <OFF> <IC=VBE, VCE> <TEMP=T>
Examples:
Q23 10 24 13 QMOD IC=0.6, 5.0
Q50A 11 26 4 20 MOD1
NC, NB, and NE are the collector, base, and emitter
nodes, respectively. NS is the (optional) substrate node.
If unspecified, ground is used. MNAME is the model name,
AREA is the area factor, and OFF indicates an (optional)
initial condition on the device for the dc analysis. If the
area factor is omitted, a value of 1.0 is assumed. The
(optional) initial condition specification using IC=VBE, VCE
is intended for use with the UIC option on the .TRAN control
line, when a transient analysis is desired starting from
other than the quiescent operating point. See the .IC con-
trol line description for a better way to set transient ini-
tial conditions. The (optional) TEMP value is the tempera-
ture at which this device is to operate, and overrides the
temperature specification on the .OPTION control line.
BJT Models (NPN/PNP)
3.4.4. BJT Models (NPN/PNP)
The bipolar junction transistor model in SPICE is an
adaptation of the integral charge control model of Gummel
and Poon. This modified Gummel-Poon model extends the ori-
ginal model to include several effects at high bias levels.
The model automatically simplifies to the simpler Ebers-Moll
model when certain parameters are not specified. The param-
eter names used in the modified Gummel-Poon model have been
chosen to be more easily understood by the program user, and
to reflect better both physical and circuit design thinking.
The dc model is defined by the parameters IS, BF, NF,
ISE, IKF, and NE which determine the forward current gain
characteristics, IS, BR, NR, ISC, IKR, and NC which deter-
mine the reverse current gain characteristics, and VAF and
VAR which determine the output conductance for forward and
reverse regions. Three ohmic resistances RB, RC, and RE are
included, where RB can be high current dependent. Base
charge storage is modeled by forward and reverse transit
times, TF and TR, the forward transit time TF being bias
dependent if desired, and nonlinear depletion layer capaci-
tances which are determined by CJE, VJE, and MJE for the B-E
junction , CJC, VJC, and MJC for the B-C junction and CJS,
VJS, and MJS for the C-S (Collector-Substrate) junction.
The temperature dependence of the saturation current, IS, is
determined by the energy-gap, EG, and the saturation current
temperature exponent, XTI. Additionally base current tem-
perature dependence is modeled by the beta temperature
exponent XTB in the new model. The values specified are
assumed to have been measured at the temperature TNOM, which
can be specified on the .OPTIONS control line or overridden
by a specification on the .MODEL line.
The BJT parameters used in the modified Gummel-Poon
model are listed below. The parameter names used in earlier
versions of SPICE2 are still accepted.
Modified Gummel-Poon BJT Parameters.
name parameter units default example area
1 IS transport saturation current A 1.0e-16 1.0e-15 *
2 BF ideal maximum forward beta - 100 100
3 NF forward current emission coefficient - 1.0 1
4 VAF forward Early voltage V infinite 200
5 IKF corner for forward beta
high current roll-off A infinite 0.01 *
6 ISE B-E leakage saturation current A 0 1.0e-13 *
7 NE B-E leakage emission coefficient - 1.5 2
8 BR ideal maximum reverse beta - 1 0.1
9 NR reverse current emission coefficient - 1 1
10 VAR reverse Early voltage V infinite 200
11 IKR corner for reverse beta
high current roll-off A infinite 0.01 *
12 ISC B-C leakage saturation current A 0 1.0e-13 *
13 NC B-C leakage emission coefficient - 2 1.5
14 RB zero bias base resistance Z 0 100 *
15 IRB current where base resistance
falls halfway to its min value A infinite 0.1 *
16 RBM minimum base resistance
at high currents Z RB 10 *
17 RE emitter resistance Z 0 1 *
18 RC collector resistance Z 0 10 *
19 CJE B-E zero-bias depletion capacitance F 0 2pF *
20 VJE B-E built-in potential V 0.75 0.6
21 MJE B-E junction exponential factor - 0.33 0.33
22 TF ideal forward transit time sec 0 0.1ns
23 XTF coefficient for bias dependence of TF - 0
24 VTF voltage describing VBC
dependence of TF V infinite
25 ITF high-current parameter
for effect on TF A 0 *
26 PTF excess phase at freq=1.0/(TF*2PI) Hz deg 0
27 CJC B-C zero-bias depletion capacitance F 0 2pF *
28 VJC B-C built-in potential V 0.75 0.5
29 MJC B-C junction exponential factor - 0.33 0.5
30 XCJC fraction of B-C depletion capacitance - 1
connected to internal base node
31 TR ideal reverse transit time sec 0 10ns
32 CJS zero-bias collector-substrate
capacitance F 0 2pF *
33 VJS substrate junction built-in potential V 0.75
34 MJS substrate junction exponential factor - 0 0.5
35 XTB forward and reverse beta
temperature exponent - 0
36 EG energy gap for temperature
effect on IS eV 1.11
37 XTI temperature exponent for effect on IS - 3
38 KF flicker-noise coefficient - 0
39 AF flicker-noise exponent - 1
40 FC coefficient for forward-bias
depletion capacitance formula - 0.5
o
41 TNOM Parameter measurement temperature C 27 50
JFET Models (NJF/PJF)
3.4.6. JFET Models (NJF/PJF)
The JFET model is derived from the FET model of Shich-
man and Hodges. The dc characteristics are defined by the
parameters VTO and BETA, which determine the variation of
drain current with gate voltage, LAMBDA, which determines
the output conductance, and IS, the saturation current of
the two gate junctions. Two ohmic resistances, RD and RS,
are included. Charge storage is modeled by nonlinear deple-
tion layer capacitances for both gate junctions which vary
as the -1/2 power of junction voltage and are defined by the
parameters CGS, CGD, and PB.
Note that in Spice3f and later, a fitting parameter B
has been added. For details, see [9].
name parameter units default example area
1 VTO threshold voltage (V V -2.0 -2.0
TO 2
2 BETA transconductance parameter (B) A/V 1.0e-4 1.0e-3 *
3 LAMBDA channel-length modulation
parameter (L) 1/V 0 1.0e-4
4 RD drain ohmic resistance Z 0 100 *
5 RS source ohmic resistance Z 0 100 *
6 CGS zero-bias G-S junction capacitance (C ) F 0 5pF *
gs
7 CGD zero-bias G-D junction capacitance (C ) F 0 1pF *
gs
8 PB gate junction potential V 1 0.6
9 IS gate junction saturation current (I ) A 1.0e-14 1.0e-14 *
S
10 B doping tail parameter - 1 1.1
11 KF flicker noise coefficient - 0
12 AF flicker noise exponent - 1
13 FC coefficient for forward-bias - 0.5
depletion capacitance formula
o
14 TNOM parameter measurement temperature C 27 50
MOSFETs
3.4.7. MOSFETs
General form:
MXXXXXXX ND NG NS NB MNAME <L=VAL> <W=VAL> <AD=VAL> <AS=VAL>
+ <PD=VAL> <PS=VAL> <NRD=VAL> <NRS=VAL> <OFF>
+ <IC=VDS, VGS, VBS> <TEMP=T>
Examples:
M1 24 2 0 20 TYPE1
M31 2 17 6 10 MODM L=5U W=2U
M1 2 9 3 0 MOD1 L=10U W=5U AD=100P AS=100P PD=40U PS=40U
ND, NG, NS, and NB are the drain, gate, source, and bulk
(substrate) nodes, respectively. MNAME is the model name.
L and W are the channel length and width, in meters. AD and
AS are the areas of the drain and source diffusions, in
2
meters . Note that the suffix U specifies microns (1e-6 m)
2
and P sq-microns (1e-12 m ). If any of L, W, AD, or AS are
not specified, default values are used. The use of defaults
simplifies input file preparation, as well as the editing
required if device geometries are to be changed. PD and PS
are the perimeters of the drain and source junctions, in
meters. NRD and NRS designate the equivalent number of
squares of the drain and source diffusions; these values
multiply the sheet resistance RSH specified on the .MODEL
control line for an accurate representation of the parasitic
series drain and source resistance of each transistor. PD
and PS default to 0.0 while NRD and NRS to 1.0. OFF indi-
cates an (optional) initial condition on the device for dc
analysis. The (optional) initial condition specification
using IC=VDS, VGS, VBS is intended for use with the UIC
option on the .TRAN control line, when a transient analysis
is desired starting from other than the quiescent operating
point. See the .IC control line for a better and more con-
venient way to specify transient initial conditions. The
(optional) TEMP value is the temperature at which this dev-
ice is to operate, and overrides the temperature specifica-
tion on the .OPTION control line. The temperature specifi-
cation is ONLY valid for level 1, 2, 3, and 6 MOSFETs, not
for level 4 or 5 (BSIM) devices.
MOSFET Models (NMOS/PMOS)
3.4.8. MOSFET Models (NMOS/PMOS)
SPICE provides four MOSFET device models, which differ
in the formulation of the I-V characteristic. The variable
LEVEL specifies the model to be used:
LEVEL=1 -> Shichman-Hodges
LEVEL=2 -> MOS2 (as described in [1])
LEVEL=3 -> MOS3, a semi-empirical model(see [1])
LEVEL=4 -> BSIM (as described in [3])
LEVEL=5 -> new BSIM (BSIM2; as described in [5])
LEVEL=6 -> MOS6 (as described in [2])
The dc characteristics of the level 1 through level 3 MOS-
FETs are defined by the device parameters VTO, KP, LAMBDA,
PHI and GAMMA. These parameters are computed by SPICE if
process parameters (NSUB, TOX, ...) are given, but user-
specified values always override. VTO is positive (nega-
tive) for enhancement mode and negative (positive) for
depletion mode N-channel (P-channel) devices. Charge
storage is modeled by three constant capacitors, CGSO, CGDO,
and CGBO which represent overlap capacitances, by the non-
linear thin-oxide capacitance which is distributed among the
gate, source, drain, and bulk regions, and by the nonlinear
depletion-layer capacitances for both substrate junctions
divided into bottom and periphery, which vary as the MJ and
MJSW power of junction voltage respectively, and are deter-
mined by the parameters CBD, CBS, CJ, CJSW, MJ, MJSW and PB.
Charge storage effects are modeled by the piecewise linear
voltages-dependent capacitance model proposed by Meyer. The
thin-oxide charge-storage effects are treated slightly dif-
ferent for the LEVEL=1 model. These voltage-dependent capa-
citances are included only if TOX is specified in the input
description and they are represented using Meyer's formula-
tion.
There is some overlap among the parameters describing
the junctions, e.g. the reverse current can be input either
2
as IS (in A) or as JS (in A/m ). Whereas the first is an
absolute value the second is multiplied by AD and AS to give
the reverse current of the drain and source junctions
respectively. This methodology has been chosen since there
is no sense in relating always junction characteristics with
AD and AS entered on the device line; the areas can be
defaulted. The same idea applies also to the zero-bias
junction capacitances CBD and CBS (in F) on one hand, and CJ
2
(in F/m ) on the other. The parasitic drain and source
series resistance can be expressed as either RD and RS (in
ohms) or RSH (in ohms/sq.), the latter being multiplied by
the number of squares NRD and NRS input on the device line.
A discontinuity in the MOS level 3 model with respect
to the KAPPA parameter has been detected (see [10]). The
supplied fix has been implemented in Spice3f2 and later.
Since this fix may affect parameter fitting, the option
"BADMOS3" may be set to use the old implementation (see the
section on simulation variables and the ".OPTIONS" line).
SPICE level 1, 2, 3 and 6 parameters:
name parameter units default example
1 LEVEL model index - 1
2 VTO zero-bias threshold voltage (V ) V 0.0 1.0
TO 2
3 KP transconductance parameter A/V 2.0e-5 3.1e-5
1/2
4 GAMMA bulk threshold parameter (\) V 0.0 0.37
5 PHI surface potential (U) V 0.6 0.65
6 LAMBDA channel-length modulation
(MOS1 and MOS2 only) (L) 1/V 0.0 0.02
7 RD drain ohmic resistance Z 0.0 1.0
8 RS source ohmic resistance Z 0.0 1.0
9 CBD zero-bias B-D junction capacitance F 0.0 20fF
10 CBS zero-bias B-S junction capacitance F 0.0 20fF
11 IS bulk junction saturation current (I ) A 1.0e-14 1.0e-15
S
12 PB bulk junction potential V 0.8 0.87
13 CGSO gate-source overlap capacitance
per meter channel width F/m 0.0 4.0e-11
14 CGDO gate-drain overlap capacitance
per meter channel width F/m 0.0 4.0e-11
15 CGBO gate-bulk overlap capacitance
per meter channel length F/m 0.0 2.0e-10
16 RSH drain and source diffusion
sheet resistance Z/[] 0.0 10.0
17 CJ zero-bias bulk junction bottom cap.
2
per sq-meter of junction area F/m 0.0 2.0e-4
18 MJ bulk junction bottom grading coeff. - 0.5 0.5
19 CJSW zero-bias bulk junction sidewall cap.
per meter of junction perimeter F/m 0.0 1.0e-9
20 MJSW bulk junction sidewall grading coeff. - 0.50(level1)
0.33(level2, 3)
21 JS bulk junction saturation current
2
per sq-meter of junction area A/m 1.0e-8
22 TOX oxide thickness meter 1.0e-7 1.0e-7
3
23 NSUB substrate doping 1/cm 0.0 4.0e15
2
24 NSS surface state density 1/cm 0.0 1.0e10
2
25 NFS fast surface state density 1/cm 0.0 1.0e10
continued
name parameter units default example
26 TPG type of gate material: - 1.0
+1 opp. to substrate
-1 same as substrate
0 Al gate
27 XJ metallurgical junction depth meter 0.0 1M
28 LD lateral diffusion meter 0.0 0.8M
2
29 UO surface mobility cm /Vs 600 700
30 UCRIT critical field for mobility
degradation (MOS2 only) V/cm 1.0e4 1.0e4
31 UEXP critical field exponent in
mobility degradation (MOS2 only) - 0.0 0.1
32 UTRA transverse field coeff. (mobility)
(deleted for MOS2) - 0.0 0.3
33 VMAX maximum drift velocity of carriers m/s 0.0 5.0e4
34 NEFF total channel-charge (fixed and
mobile) coefficient (MOS2 only) - 1.0 5.0
35 KF flicker noise coefficient - 0.0 1.0e-26
36 AF flicker noise exponent - 1.0 1.2
37 FC coefficient for forward-bias
depletion capacitance formula - 0.5
38 DELTA width effect on threshold voltage
(MOS2 and MOS3) - 0.0 1.0
39 THETA mobility modulation (MOS3 only) 1/V 0.0 0.1
40 ETA static feedback (MOS3 only) - 0.0 1.0
41 KAPPA saturation field factor (MOS3 only) - 0.2 0.5
o
42 TNOM parameter measurement temperature C 27 50
The level 4 and level 5 (BSIM1 and BSIM2) parameters
are all values obtained from process characterization, and
can be generated automatically. J. Pierret [4] describes a
means of generating a 'process' file, and the program
Proc2Mod provided with SPICE3 converts this file into a se-
quence of BSIM1 ".MODEL" lines suitable for inclusion in a
SPICE input file. Parameters marked below with an * in the
l/w column also have corresponding parameters with a length
and width dependency. For example, VFB is the basic parame-
ter with units of Volts, and LVFB and WVFB also exist and
have units of Volt-Mmeter The formula
P P
L W
P = P + ---------- + ----------
0
L W
effective effective
is used to evaluate the parameter for the actual device
specified with
L = L - DL
effective input
and
W = W - DW
effective input
Note that unlike the other models in SPICE, the BSIM
model is designed for use with a process characterization
system that provides all the parameters, thus there are no
defaults for the parameters, and leaving one out is con-
sidered an error. For an example set of parameters and the
format of a process file, see the SPICE2 implementation
notes[3].
For more information on BSIM2, see reference [5].
SPICE BSIM (level 4) parameters.
name parameter units l/w
VFB flat-band voltage V *
PHI surface inversion potential V *
1/2
K1 body effect coefficient V *
K2 drain/source depletion charge-sharing coefficient - *
ETA zero-bias drain-induced barrier-lowering coefficient - *
2
MUZ zero-bias mobility cm /V-s
DL shortening of channel Mm
DW narrowing of channel Mm
-1
U0 zero-bias transverse-field mobility degradation coefficient V *
U1 zero-bias velocity saturation coefficient Mm/V *
2 2
X2MZ sens. of mobility to substrate bias at v =0 cm /V -s *
ds -1
X2E sens. of drain-induced barrier lowering effect to substrate bias V *
-1
X3E sens. of drain-induced barrier lowering effect to drain bias at V =V V *
ds dd -2
X2U0 sens. of transverse field mobility degradation effect to substrate bias V *
-2
X2U1 sens. of velocity saturation effect to substrate bias MmV *
2 2
MUS mobility at zero substrate bias and at V =V cm /V -s
ds dd 2 2
X2MS sens. of mobility to substrate bias at V =V cm /V -s *
ds dd 2 2
X3MS sens. of mobility to drain bias at V =V cm /V -s *
ds dd -2
X3U1 sens. of velocity saturation effect on drain bias at V =V MmV *
ds dd
TOX gate oxide thickness Mm
o
TEMP temperature at which parameters were measured C
VDD measurement bias range V
CGDO gate-drain overlap capacitance per meter channel width F/m
CGSO gate-source overlap capacitance per meter channel width F/m
CGBO gate-bulk overlap capacitance per meter channel length F/m
XPART gate-oxide capacitance-charge model flag -
N0 zero-bias subthreshold slope coefficient - *
NB sens. of subthreshold slope to substrate bias - *
ND sens. of subthreshold slope to drain bias - *
RSH drain and source diffusion sheet resistance Z/[]
2
JS source drain junction current density A/m
PB built in potential of source drain junction V
MJ Grading coefficient of source drain junction -
PBSW built in potential of source, drain junction sidewall V
MJSW grading coefficient of source drain junction sidewall -
2
CJ Source drain junction capacitance per unit area F/m
CJSW source drain junction sidewall capacitance per unit length F/m
WDF source drain junction default width m
DELL Source drain junction length reduction m
XPART = 0 selects a 40/60 drain/source charge partition
in saturation, while XPART=1 selects a 0/100 drain/source
charge partition.
ND, NG, and NS are the drain, gate, and source nodes,
respectively. MNAME is the model name, AREA is the area
factor, and OFF indicates an (optional) initial condition on
the device for dc analysis. If the area factor is omitted,
a value of 1.0 is assumed. The (optional) initial condition
specification, using IC=VDS, VGS is intended for use with
the UIC option on the .TRAN control line, when a transient
analysis is desired starting from other than the quiescent
operating point. See the .IC control line for a better way
to set initial conditions.
MESFET Models (NMF/PMF)
3.4.10. MESFET Models (NMF/PMF)
The MESFET model is derived from the GaAs FET model of
Statz et al. as described in [11]. The dc characteristics
are defined by the parameters VTO, B, and BETA, which deter-
mine the variation of drain current with gate voltage, AL-
PHA, which determines saturation voltage, and LAMBDA, which
determines the output conductance. The formula are given
by:
3
2
B (V -V ) | | V | | 3
gs T ds _
I = --------------- |1 - |1-A---| |(1 + L V ) for 0 < V <
d ds ds
1 + b(V - V ) | | 3 | | A
gs T
2
B (V -V ) 3
gs T _
I = ---------------(1 + L V ) for V >
d ds ds
1 + b(V - V ) A
gs T
Two ohmic resistances, RD and RS, are included. Charge
storage is modeled by total gate charge as a function of
gate-drain and gate-source voltages and is defined by the
parameters CGS, CGD, and PB.
name parameter units default example area
1 VTO pinch-off voltage V -2.0 -2.0
2
2 BETA transconductance parameter A/V 1.0e-4 1.0e-3 *
3 B doping tail extending parameter 1/V 0.3 0.3 *
4 ALPHA saturation voltage parameter 1/V 2 2 *
5 LAMBDA channel-length modulation
parameter 1/V 0 1.0e-4
6 RD drain ohmic resistance Z 0 100 *
7 RS source ohmic resistance Z 0 100 *
8 CGS zero-bias G-S junction capacitance F 0 5pF *
9 CGD zero-bias G-D junction capacitance F 0 1pF *
10 PB gate junction potential V 1 0.6
11 KF flicker noise coefficient - 0
12 AF flicker noise exponent - 1
13 FC coefficient for forward-bias - 0.5
depletion capacitance formula
SIMULATOR VARIABLES (.OPTIONS)
4.1. SIMULATOR VARIABLES (.OPTIONS)
Various parameters of the simulations available in
Spice3 can be altered to control the accuracy, speed, or
default values for some devices. These parameters may be
changed via the "set" command (described later in the sec-
tion on the interactive front-end) or via the ".OPTIONS"
line:
General form:
.OPTIONS OPT1 OPT2 ... (or OPT=OPTVAL ...)
Examples:
.OPTIONS RELTOL=.005 TRTOL=8
The options line allows the user to reset program con-
trol and user options for specific simulation purposes.
Additional options for Nutmeg may be specified as well and
take effect when Nutmeg reads the input file. Options
specified to Nutmeg via the 'set' command are also passed on
to SPICE3 as if specified on a .OPTIONS line. See the fol-
lowing section on the interactive command interpreter for
the parameters which may be set with a .OPTIONS line and the
format of the 'set' command. Any combination of the follow-
ing options may be included, in any order. 'x' (below)
represents some positive number.
option effect
ABSTOL=x resets the absolute current error tolerance of the
program.
The default value is 1 picoamp.
BADMOS3 Use the older version of the MOS3 model with the "kappa"
discontinuity.
CHGTOL=x resets the charge tolerance of the program. The default
value is 1.0e-14.
DEFAD=x resets the value for MOS drain diffusion area; the
default is 0.0.
DEFAS=x resets the value for MOS source diffusion area; the
default is 0.0.
DEFL=x resets the value for MOS channel length; the default
is 100.0 micrometer.
DEFW=x resets the value for MOS channel width; the default
is 100.0 micrometer.
GMIN=x resets the value of GMIN, the minimum conductance
allowed by the program.
The default value is 1.0e-12.
ITL1=x resets the dc iteration limit. The default is 100.
ITL2=x resets the dc transfer curve iteration limit. The
default is 50.
ITL3=x resets the lower transient analysis iteration limit.
the default value is 4. (Note: not implemented in Spice3).
ITL4=x resets the transient analysis timepoint iteration limit.
the default is 10.
ITL5=x resets the transient analysis total iteration limit.
the default is 5000. Set ITL5=0 to omit this test.
(Note: not implemented in Spice3).
KEEPOPINFO Retain the operating point information when either an
AC, Distortion, or Pole-Zero analysis is run.
This is particularly useful if the circuit is large
and you do not want to run a (redundant) ".OP" analysis.
METHOD=name sets the numerical integration method used by SPICE.
Possible names are "Gear" or "trapezoidal" (or just "trap").
The default is trapezoidal.
PIVREL=x resets the relative ratio between the largest column entry
and an acceptable pivot value. The default value is 1.0e-3.
In the numerical pivoting algorithm the allowed minimum
pivot value is determined by
EPSREL=AMAX1(PIVREL*MAXVAL, PIVTOL)
where MAXVAL is the maximum element in the column where
a pivot is sought (partial pivoting).
PIVTOL=x resets the absolute minimum value for a matrix entry
to be accepted as a pivot. The default value is 1.0e-13.
RELTOL=x resets the relative error tolerance of the program.
The
default value is 0.001 (0.1%).
TEMP=x Resets the operating temperature of the circuit. The
default value is 27 deg C (300 deg K). TEMP can be overridden
by a temperature specification on any temperature dependent
instance.
TNOM=x resets the nominal temperature at which device parameters
are measured. The default value is 27 deg C (300 deg K).
TNOM can be overridden by a specification on any temperature
dependent device model.
TRTOL=x resets the transient error tolerance. The default value
is 7.0. This parameter is an estimate of the factor by
which SPICE overestimates the actual truncation error.
TRYTOCOMPACT Applicable only to the LTRA model.
When specified, the simulator tries to condense LTRA transmission
lines' past history of input voltages and currents.
VNTOL=x resets the absolute voltage error tolerance of the
program. The default value is 1 microvolt.
In addition, the following options have the listed
effect when operating in spice2 emulation mode:
option effect
option effect
ACCT causes accounting and run time statistics to be printed
LIST causes the summary listing of the input data to be printed
NOMOD suppresses the printout of the model parameters
NOPAGE suppresses page ejects
NODE causes the printing of the node table.
OPTS causes the option values to be printed.
.IC: Set Initial Conditions
4.2.2. .IC: Set Initial Conditions
General form:
.IC V(NODNUM)=VAL V(NODNUM)=VAL ...
Examples:
.IC V(11)=5 V(4)=-5 V(2)=2.2
The IC line is for setting transient initial condi-
tions. It has two different interpretations, depending on
whether the UIC parameter is specified on the .TRAN control
line. Also, one should not confuse this line with the
.NODESET line. The .NODESET line is only to help dc conver-
gence, and does not affect final bias solution (except for
multi-stable circuits). The two interpretations of this
line are as follows:
1. When the UIC parameter is specified on the .TRAN line,
then the node voltages specified on the .IC control line are
used to compute the capacitor, diode, BJT, JFET, and MOSFET
initial conditions. This is equivalent to specifying the
IC=... parameter on each device line, but is much more con-
venient. The IC=... parameter can still be specified and
takes precedence over the .IC values. Since no dc bias
(initial transient) solution is computed before the tran-
sient analysis, one should take care to specify all dc
source voltages on the .IC control line if they are to be
used to compute device initial conditions.
2. When the UIC parameter is not specified on the .TRAN
control line, the dc bias (initial transient) solution is
computed before the transient analysis. In this case, the
node voltages specified on the .IC control line is forced to
the desired initial values during the bias solution. During
transient analysis, the constraint on these node voltages is
removed. This is the preferred method since it allows SPICE
to compute a consistent dc solution.
.DISTO: Distortion Analysis
4.3.3. .DISTO: Distortion Analysis
General form:
.DISTO DEC ND FSTART FSTOP <F2OVERF1>
.DISTO OCT NO FSTART FSTOP <F2OVERF1>
.DISTO LIN NP FSTART FSTOP <F2OVERF1>
Examples:
.DISTO DEC 10 1kHz 100Mhz
.DISTO DEC 10 1kHz 100Mhz 0.9
The Disto line does a small-signal distortion analysis
of the circuit. A multi-dimensional Volterra series
analysis is done using multi-dimensional Taylor series to
represent the nonlinearities at the operating point. Terms
of up to third order are used in the series expansions.
If the optional parameter F2OVERF1 is not specified,
.DISTO does a harmonic analysis - i.e., it analyses distor-
tion in the circuit using only a single input frequency F1,
which is swept as specified by arguments of the .DISTO com-
mand exactly as in the .AC command. Inputs at this fre-
quency may be present at more than one input source, and
their magnitudes and phases are specified by the arguments
of the DISTOF1 keyword in the input file lines for the input
sources (see the description for independent sources). (The
arguments of the DISTOF2 keyword are not relevant in this
case). The analysis produces information about the A.C.
values of all node voltages and branch currents at the har-
monic frequencies 2F1 and 3F1, vs. the input frequency F1 as
it is swept. (A value of 1 (as a complex distortion output)
signifies cos(2J(2F1)t) at 2F1 and cos(2J(3F1)t) at 3F1,
using the convention that 1 at the input fundamental fre-
quency is equivalent to cos(2JF1t).) The distortion com-
ponent desired (2F1 or 3F1) can be selected using commands
in nutmeg, and then printed or plotted. (Normally, one is
interested primarily in the magnitude of the harmonic com-
ponents, so the magnitude of the AC distortion value is
looked at). It should be noted that these are the A.C.
values of the actual harmonic components, and are not equal
to HD2 and HD3. To obtain HD2 and HD3, one must divide by
the corresponding A.C. values at F1, obtained from an .AC
line. This division can be done using nutmeg commands.
If the optional F2OVERF1 parameter is specified, it
should be a real number between (and not equal to) 0.0 and
1.0; in this case, .DISTO does a spectral analysis. It con-
siders the circuit with sinusoidal inputs at two different
frequencies F1 and F2. F1 is swept according to the .DISTO
control line options exactly as in the .AC control line. F2
is kept fixed at a single frequency as F1 sweeps - the value
at which it is kept fixed is equal to F2OVERF1 times FSTART.
Each independent source in the circuit may potentially have
two (superimposed) sinusoidal inputs for distortion, at the
frequencies F1 and F2. The magnitude and phase of the F1
component are specified by the arguments of the DISTOF1 key-
word in the source's input line (see the description of
independent sources); the magnitude and phase of the F2 com-
ponent are specified by the arguments of the DISTOF2 key-
word. The analysis produces plots of all node
voltages/branch currents at the intermodulation product fre-
quencies F1 + F2, F1 - F2, and (2 F1) - F2, vs the swept
frequency F1. The IM product of interest may be selected
using the setplot command, and displayed with the print and
plot commands. It is to be noted as in the harmonic
analysis case, the results are the actual AC voltages and
currents at the intermodulation frequencies, and need to be
normalized with respect to .AC values to obtain the IM
parameters.
If the DISTOF1 or DISTOF2 keywords are missing from the
description of an independent source, then that source is
assumed to have no input at the corresponding frequency.
The default values of the magnitude and phase are 1.0 and
0.0 respectively. The phase should be specified in degrees.
It should be carefully noted that the number F2OVERF1
should ideally be an irrational number, and that since this
is not possible in practice, efforts should be made to keep
the denominator in its fractional representation as large as
possible, certainly above 3, for accurate results (i.e., if
F2OVERF1 is represented as a fraction A/B, where A and B are
integers with no common factors, B should be as large as
possible; note that A < B because F2OVERF1 is constrained to
be < 1). To illustrate why, consider the cases where
F2OVERF1 is 49/100 and 1/2. In a spectral analysis, the
outputs produced are at F1 + F2, F1 - F2 and 2 F1 - F2. In
the latter case, F1 - F2 = F2, so the result at the F1-F2
component is erroneous because there is the strong fundamen-
tal F2 component at the same frequency. Also, F1 + F2 = 2
F1 - F2 in the latter case, and each result is erroneous
individually. This problem is not there in the case where
F2OVERF1 = 49/100, because F1-F2 = 51/100 F1 < > 49/100 F1 =
F2. In this case, there are two very closely spaced fre-
quency components at F2 and F1 - F2. One of the advantages
of the Volterra series technique is that it computes distor-
tions at mix frequencies expressed symbolically (i.e. n F1 +
m F2), therefore one is able to obtain the strengths of dis-
tortion components accurately even if the separation between
them is very small, as opposed to transient analysis for
example. The disadvantage is of course that if two of the
mix frequencies coincide, the results are not merged
together and presented (though this could presumably be done
as a postprocessing step). Currently, the interested user
should keep track of the mix frequencies himself or herself
and add the distortions at coinciding mix frequencies
together should it be necessary.